Currently, there are a number of wafer-to-wafer bonding techniques that have been used for packaging semiconductor devices. Techniques used have included silicon-to-glass anodic bonding, silicon-to-silicon fusion bonding, and wafer-to-wafer bonding using intermediate materials as the actual bonding media. Such intermediate materials have included silicon dioxide, and soft metals such as gold, indium, and aluminum, and have been bonded using electrical, thermal and/or compression techniques.
There are various problems with all of these techniques. The anodic bonding of a glass wafer to a silicon wafer involves the use of high voltages that can be detrimental to the electronic circuits present on the silicon wafer. Similarly, the silicon-to-silicon bonding has to be done at very high voltage and also at a high temperature. Both of these techniques can melt metals with lower melting points than the temperature required to perform the bonding so they can not be used with certain types of semiconductor devices on silicon wafers. Materials such as glass frit involve relatively large bonding areas which results in an increased die size thereby limiting the number of devices that can be fabricated on a given wafer. Further, some of these techniques can not assure reliable hermetic seals of the packaged device.
One example of such packaging method is shown in U.S. Pat. No. 5,448,014 to Kong et al. However, Kong et al. requires multi-layer standoffs to adjust the distance between the two wafers. Additionally, the disclosed use of different materials for each of the wafers can cause potentially adverse consequences due to the different thermal coefficients of expansion of the materials when the package is manufactured using heat as disclosed.
A relatively simple process that would provide a non-electrical, low temperature method for hermetically packaging micro devices on or in semiconductor wafers has long been sought. Further, a process has been sought which uses processes that are standard, or close to standard, and presently used in a typical semiconductor laboratory or manufacturing facility.
Also, in the past, making electrical contact to the packaged devices was difficult because existing methods did not provide a wafer-to-wafer seal that allows the electrical conductor to pass through the wafer package itself without the use of epoxy, grommets, or sealing rings in the through holes around the wires. The previous sealing techniques, besides being very small and difficult to implement, were subject to leaking because of the flexing of the wire in the seal, which would open the seal.